Written by Umair Riaz 07-Jun-2021 | 0 Comments

Want to Design Systems On High Abstraction Level? Try SystemC

Never heard? Here it is, you can design your systems using high-level languages to bring more abstraction to your design and reduce time cost. According to the International Technology Roadmap for Semiconductors (ITRS) “cost of design is the greatest threat to the continuation of the semiconductor roadmap”.  


For more realization, first, we need to know the rapidly changing definition of systems. Today, modern systems are far more complex than ever before. Nowadays, a small system can contain a microprocessor linked together with memory and peripherals through complex on-chip busses, processing data, taking real-time decisions, and propagating them to the external world at a tremendous pace.


Therefore, to model complex systems on a high abstraction level, C++ is there. But the problem with the C++ language is that concurrency can’t be modeled using a sequential language. So, to model the concurrent behavior of the hardware, there is a need for some mechanism and that’s where SystemC comes into play. SystemC is a library written in C++ language to model hardware in a sequential language.

Uses of SystemC

Coming towards the uses of SystemC, the following are the areas where SystemC can be applied:

  • System-Level Modeling

  • Architectural Exploration

  • Functional Verification

  • Reference Modeling

  • Software Development

  • Performance Modeling

  • High-Level Synthesis


The following figure shows where SystemC, Verilog, SystemVerilog, and VHDL fit in the hardware modeling paradigm.

Example

Let’s look at a very basic example of modeling a clock in SystemC and compared it with how we can do it in Verilog.


SystemC

Verilog

sc_clock m555("m555",
20, 0.5, 5, true);

module m555 (clock);
  output clock;
  reg clock;
  initial
    #5 clock = 1;
  always
    #50 clock = ~clock;
endmodule


Industry Involvement 

As SystemC is quite useful in various areas, companies have developed SystemC models of various IPs that can be integrated with any design to speed up the process.

Synopsys® provides functionally accurate SystemC models for Synopsys DesignWare Interface IPs and many others. ARM® also delivers SystemC cycle-accurate models for its various processors like Cortex-A53, Cortex-R52, and Cortex-M7. These models can be utilized by a designer to build platforms and configure them early in the development cycle.

Learning Resources

Several books and online courses are available on SystemC, but the important thing is where to start and what to learn. An effort has been done on this and the following are the resources and contents from where you can kick off learning SystemC. These contents are gathered from various courses offered by top-notch companies, i.e. Cadence, Siemens, and the training services providers, i.e. Doulos and others.


Summary of the fundamental SystemC concepts that need to be learned:

  • Modules

  • Communication (Channels, ports, and exports)

  • Module Constructor

  • Events and Event Scheduler

  • Modeling behavior

    • Processes

      • METHOD

      • THREAD

      • CTHREAD

    • Module Instantiation

    • Simulation Initialization

  • SystemC Data Types

    • Integer - Signed/Unsigned

      • Fixed precision

      • Arbitrary precision

    • Fixed-point Data Types

  • Primitive Channels

  • User-defined Channels

  • Debugging and Tracing


Further Resources:

  • Language Reference Manual of SystemC

  • [Book] SystemC: From the Ground Up by David C. Black et al.

  • [Book] System Design with SystemC by Thorsten Grotker et al.

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