RISC-V: Tomorrows Processing Power
RISC-V is an open standard instruction set architecture (ISA) that is being readily adopted to transform processors from data centers to AI-on-the-edge. 10xEngineers is a development partner of RISC-V International and a contributor to the ratification of RISC-V ISA. Our team of 70+ engineers collaborates with the leading RISC-V companies to accelerate their market to time.
Our Expertise
RISC-V Design Services
RISC-V has emerged as a promising, open-source alternative in the ever-evolving landscape of processor architectures. As the demand for computational power continues to surge, enhancing RISC-V core performance becomes imperative. At 10xEngineers, our dedicated RISC-V core and uncore IP Design team is continuously exploring ways to push the boundaries of RISC-V capabilities. A key focus of our open-source efforts is the OpenHW Group’s CVA6 core, an application-class RISC-V processor. Simultaneously, we leverage our deep expertise in processor design and verification to partner with customers, accelerating their time-to-market while ensuring superior design and performance quality.
RISC-V Verification Services
Tap into our RISC-V verification solution to build modern and complex systems within remarkably short timeframes. Our expert verification team specializes in:
Core Verification
Our team has extensive expertise in verifying RISC-V in-order and out-of-order cores. We have experience working with both privileged and unprivileged specifications and vector extensions of RISC-V.
IP Verification
We assist our customers in verifying various IP, including I3C, JTAG, AIA, IOMMU, and Die-to-Die (Chiplets) interfaces. Our verification process utilizes either third-party VIPs (Cadence, Avery) or internally developed VIPs to ensure thorough and accurate validation.
Deep Learning Accelerator Verification
Our team has developed and integrated the UVM verification environment with existing UVCs to enable comprehensive full-chip design verification for a neural accelerator, creating detailed test plans and coverage plans.
Development of UVM Testbenches
We developed and enhanced UVM testbenches for multiple RISC-V extensions and IPs, ensuring thorough coverage of key features by developing and implementing test plans.
Test Generators
We help you to integrate industry-standard random and automated test generators, including STiNG (Valtrix), RISCV-DV, Torture, and Imperas, into testbenches for enhanced verification coverage.
Code Coverage and Regression Management
We ensure comprehensive code and functional coverage closure by using directed and random tests, along with guided UNR. Our approach also includes regression triage and CI testing to uphold the highest standards of quality.
RISC-V Software Development Services
For the fast growing RISC-V ecosystem, software is a key element that can determine success. 10xEngineers offers some key software development services that can help reduce the Time to Market for your product.
Clients & Partners
